CAD Architect / EDA Solutions Lead

Role Overview: We are seeking a visionary CAD Architect to lead, design, establish, and optimize our chip design infrastructure and EDA tool flows. In this strategic role, you will be the backbone of our silicon design engine architecting scalable design environments, automating front-end and back-end flows across Analog/Mixed-Signal and Digital domains, and driving technology node enablement. You will partner directly with design leads to ensure peak engineering productivity, robust revision control, and seamless PDK integration. Key Responsibilities: CAD & Flow Architecture: Define, architect, and deploy end-to-end design methodologies and automated execution flows for both Analog/Mixed-Signal (Cadence Virtuoso, Spectre) and Digital/SoC (Synopsys, Cadence synthesis/STA/P&R) tracks. PDK & Foundry Management: Manage process design kit (PDK) installation, tech file customization, DRC/LVS rule deck verification, and technology file qualification across foundry nodes. Infrastructure & Automation: Develop robust infrastructure automation, CI/CD pipelines, and custom scripting (Python, TCL, SKILL, PERL, Bash) to streamline simulation, regression testing, and sign-off verification. Tool & License Strategy: Manage vendor relationships with major EDA suppliers, optimize floating license utilization, evaluate emerging EDA software, and manage tool version upgrades across teams. Design Environment & Compute Management: Architect high-performance computing (HPC) environments, compute farm grid management (LSF/Grid Engine), data management, and revision control systems (Git, Perforce, IC Manage). Cross-Functional Enablement: Train design engineers on flow best practices, establish standard design methodologies, and lead root-cause troubleshooting for complex EDA tool bugs or environment failures. Qualifications & Requirements Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, VLSI, or a related technical discipline, and 10+ years of experience Core Expertise: Deep expertise in EDA environments spanning custom analog, digital front-end/back-end, and physical verification sign-off flows. Expert-level programming/scripting abilities in Python, TCL, Shell, and SKILL (or PERL). Hands-on experience installing, setting up, and customizing PDKs from major foundries (TSMC, UMC, GlobalFoundries, or Tower). Direct experience with revision control platforms (Git, Perforce, IC Manage) and compute farm grid schedulers (LSF/SLURM/SGE). System Knowledge: Advanced understanding of Linux system administration, storage architectures (NFS), and cloud/hybrid-cloud CAD deployment strategies. Bonus Qualifications: Prior experience as a design engineer before transitioning into CAD architecture, or background managing CAD environments for mixed-signal sensor chip designs. What We Offer: Collaborative culture working alongside industry veterans in image sensors and system architecture. Opportunity to build high-impact, semiconductor technology for critical global applications. Competitive compensation package including equity options. About Bharat Semi (bsemis.com) Bharat Semi is a fabless semiconductor technology company developing high-reliability sensors and semiconductor-based sensing platforms. We bridge the physical-digital interface by building AI-ready hardware engineered for demanding environments spanning defense, surveillance, automotive, and industrial IoT workloads. We push the boundaries of low-power, high-precision chip architecture to power the next generation of intelligent, mission-critical sensing devices.